1. Field of the Invention
This invention relates to a decoding system and method for decoding a bit stream with the characteristic of data partition; more particularly, the present invention relates to a video decoding system and method employed in a video decoding apparatus for decoding a video bit stream having the characteristic of data partition.
2. Description of the Prior Art
Various standards have been established to facilitate transmitting, storing, and modifying digital multimedia data. For the Moving Picture Coding Experts Group/IV (MPEG4) standard ISO/IEC 14496-2, which is one of the video encoding standards, the corresponding tools can support a wide variety of encoding characteristics. Because the MPEG4 standard has flexible encoding structures, the MPEG4 standard can support various kinds of different encoding tool combinations. MPEG4 can also support the required functions corresponding to different kinds of software applications, for example: electronic calculators, distance educations, and entertainment businesses.
The decoding method of the data partition video bit stream is one of the key technologies used by video apparatus. In general, the data partition video bit stream includes at least one video packet. The video packet includes a plurality of logic units. Each logic unit includes at least one encoded parameter. After the corresponding encoded parameters of all the logic units have been decoded, the data required to form the video macroblock can be obtained.
FIGS. 1A through 1C are quoted from the Moving Picture Experts Group/I standard ISO/IEC 14496-2, and are respectively a schematic diagram of a video packet of a data partition predictive video object plane (P-VOP). The data partition video packet 20 includes three logic units, which are the first logic unit 22, the second logic unit 24, and the third logic unit 26 respectively. The first logic unit 22, the second logic unit 24, and the third logic unit 26 are in a loop form. Besides, the video packet (not shown) of a data partition intra video object plane (I-VOP) and the video packet 20 of a data partition P-VOP have similar structures; both comprise three logic units, and both belong to one of the forms of the video packet of a data partition MPEG-4 video object plane (MPEG4-VOP).
The starting positions of the first logic unit 22, the second logic unit 24, and the third logic unit 26 to be decoded are the positions indicated by mark 21, mark 23, and mark 25 respectively, and they are the first starting decoding address, the second starting decoding address, and the third starting decoding address, respectively. A resynchronization marker 29 is located between the first logic unit 22 and the second logic unit 24 to clearly divide the first logic unit 22 and the second logic unit 24, but no resynchronization marker is located between the second logic unit 24 and the third logic unit 26.
Referring to FIG. 2, FIG. 2 is a schematic diagram of the encoded parameters of the video packet. The video packet 30 includes three logic units, which are the first logic unit 32, the second logic unit 34, and the third logic unit 36, respectively.
The required three corresponding encoded parameters, which are respectively a1 41, a2 42, and a3 43, for later decoding operations to produce the plurality of the pixel data of the macroblock A (not shown), and they are distributed in the first logic unit 32, the second logic unit 34, and the third logic unit 36, respectively. After the encoded parameters (a1 41, a2 42, and a3 43) are decoded, the three decoded parameters (A1, A2, and A3, not shown) are obtained, wherein a1 41, a2 42, and a3 43 correspond to A1, A2, and A3. After the three decoded parameters (A1, A2, and A3) are integrated, and after the later decoding operations, the plurality of pixel data required to form the macroblock (A) can be obtained.
The required three corresponding encoded parameters, which are respectively b1 44, b2 45, and b3 46, for later decoding operations to produce the plurality of the pixel data of the macroblock B (not shown), and they are distributed in the first logic unit 32, the second logic unit 34, and the third logic unit 36 respectively. After the encoded parameters (b1 44, b2 45, and b3 46) are decoded, the three decoded parameters (B1, B2, and B3, not shown) are obtained, wherein b1 44, b2 45, and b3 46 correspond to B1, B2, and B3. After the three decoded parameters (B1, B2, and B3) are integrated, and after the later decoding operations, the plurality of pixel data required to form the macroblock (B) can be obtained.
The required three corresponding encoded parameters, which are respectively c1 47, c2 48, and c3 49, for later decoding operations to produce the plurality of the pixel data of the macroblock C (not shown), and they are distributed in the first logic unit 32, the second logic unit 34, and the third logic unit 36 respectively. After the encoded parameters (c1 47, c2 48, and c3 49) are decoded, the three decoded parameters (C1, C2, and C3, not shown) are obtained, wherein c1 47, c2 48, and c3 49 correspond to the C1, C2, and C3. After the three decoded parameters (C1, C2, and C3) are integrated, and after the later decoding operations, the plurality of pixel data required to form the macroblock (C) can be obtained.
The decoding method in the related art briefly includes the following steps. After sequentially decodes the encoded parameters (a1 41, b1 44, and c1 47) of the first logic unit 32, the related art method sequentially outputs and temporarily stores the decoded parameters (A1, B1, and C1) in a memory, such as a Dynamic Random Access Memory (DRAM).
After all the encoded data in the first logic unit 32 have been completely outputted and temporarily stored in the memory, then the second logic unit can be decoded. After the a2 42, b2 45, and c2 48 of the second logic unit 34 have been sequentially decoded, the related art method sequentially outputs and temporarily stores the A2, B2, and C2 in the memory. After all the encoded data in the second logic unit 34 have been completely outputted and temporarily stored in the memory, then the third logic unit can be decoded.
When decoding the encoded data of the third logic unit 36, there is a difference in comparison with the aforementioned steps. That is, after the related art method decodes the a3 43 of the third logic unit 36 to obtain the decoded data A3, it reads the A1 and A2 stored in the memory in order to obtain all decoded parameters A1, A2 and A3. After A1, A2, and A3 are integrated, the integrated data for later decoding operations of the plurality of pixel data required to form the macroblock A can be obtained. Then, the related art method performs the decoding operation according to the integrated data, so as to completely obtain the plurality of pixel data of the video macroblock A. After the a3 43 is decoded, the related art method decodes the encoded data (b3 46) of the third logic unit 36 next. After the B3 is obtained, the related art method reads the B1 and B2 stored in the memory. After B1, B2, and B3 are integrated, the integrated data for later decoding operations of the plurality of pixel data required to form the macroblock B can be obtained. Then, the related art method performs the decoding operation according to the integrated data, so as to completely obtain the plurality of pixel data of the video macroblock B. After the b3 46 is decoded, the related art method decodes the encoded data c3 49 of the third logic unit 36 next. After the C3 is obtained, the related art method reads the C1 and C2 stored in the memory. After C1, C2, and C3 are integrated, the integrated data for later decoding operations of the plurality of pixel data required to form the macroblock C can be obtained. The related art method performs the decoding operation according to the integrated data, so as to completely obtain the plurality of pixel data of the video macroblock (C); then, the decoding operations of the video packet 30 is completed. Next, the related art method decodes the other video packets of the video bit stream according to the same steps, so as to complete the decoding operations of the video bit stream.
The related art decoding method has disadvantages, and some are listed as follows. Firstly, it requires larger memory space for storing the decoded data obtained by decoding the first and the second logic unit, and thus it costs more. Secondly, the decoded data obtained by decoding the first and the second logic unit must be temporarily stored in the memory, and then is later retrieved when the third logic unit is decoded. These storing and reading operations consume time, and thus more time is required to decode and form a macroblock. Furthermore, the required system bandwidth is greatly increased due to these storing and retrieving operations.
Therefore, an objective of the present invention is to provide a decoding system and method of the video bit stream for solving the aforementioned problems.